CY7C140
Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- 1K x 8 organization
- 0.65-micron CMOS for optimum speed/power
- High-speed access: 15 ns
- Low operating power: ICC = 90 m A (max.)
- Fully asynchronous operation
- Automatic power-down
- Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141
- BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141
- INT flag for port-to-port munication
- Available in 48-pin DIP (CY7C130/140), 52-pin PLCC and 52-pin TQFP
- Pin-patible and functionally equivalent to IDT7130/IDT7140
Functional Description
The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port...
