CY7C25652KV18, CY7C25632KV18 Datasheet - Cypress Semiconductor

CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture

CY7C25652KV18 Features

* Separate independent read and write data ports

* Supports concurrent transactions

* 550 MHz clock for high bandwidth

* Four-word burst for reducing address bus frequency

* Double data rate (DDR) interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz

Datasheet Details

CY7C25652KV18, CY7C25632KV18

Cypress Semiconductor

608.41 KB

72-mbit qdr ii+ sram four-word burst architecture.

This datasheet PDF includes multiple part numbers: CY7C25652KV18, CY7C25632KV18.
Please refer to the document for exact specifications by model.

📁 Related Datasheet

CY7C2565KV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C2565XV18 72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C2561KV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C2562XV18 72-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture (Cypress Semiconductor)

CY7C25632KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C2563KV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C2563XV18 72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C2564XV18 72-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture (Cypress Semiconductor)

TAGS

CY7C25652KV18 Distributor