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CY7C2565XV18, CY7C2563XV18 72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture

CY7C2565XV18 Description

CY7C2563XV18/CY7C2565XV18 72-Mbit QDR® II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 72-Mbit QDR® II+ Xtreme SRAM Fo.

CY7C2565XV18 Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 633 MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces on both read and write ports (data transferred at 1266 MHz) at 633 MHz

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: CY7C2565XV18, CY7C2563XV18. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
CY7C2565XV18, CY7C2563XV18
Manufacturer
Cypress Semiconductor
File Size
1.19 MB
Datasheet
CY7C2563XV18-CypressSemiconductor.pdf
Description
72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
Note
This datasheet PDF includes multiple part numbers: CY7C2565XV18, CY7C2563XV18.
Please refer to the document for exact specifications by model.

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📌 All Tags

72-Mbit QDR II + Xtreme SRAM Four-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C2565XV18-like datasheet