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CY7C2670KV18 144-Mbit DDR II+ SRAM Two-Word Burst Architecture

CY7C2670KV18 Description

CY7C2670KV18 144-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 144-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.

CY7C2670KV18 Features

* 144-Mbit density (4 M × 36)
* 550-MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces (data transferred at 1100 MHz) at 550 MHz
* Available in 2.5 clock cycle latency
* Two input clocks (K and K) for precise D

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Datasheet Details

Part number
CY7C2670KV18
Manufacturer
Cypress Semiconductor
File Size
585.49 KB
Datasheet
CY7C2670KV18-CypressSemiconductor.pdf
Description
144-Mbit DDR II+ SRAM Two-Word Burst Architecture

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📌 All Tags

144-Mbit DDR II + SRAM Two-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C2670KV18-like datasheet