Description
SHM 35-Series: SHM35920-L Family Datasheet System Hardware Manager (SHM) General .
SHM 35-Series is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex®-M0.
Features
* 32-bit MCU Subsystem
* 48 MHz ARM Cortex-M0 CPU with single-cycle multiply
* Up to 256 kB of flash with Read Accelerator
* Up to 32 kB of SRAM
* DMA engine with 32 channels
Programmable Analog
* Four opamps that operate in Deep Sleep mode at very low
current levels
* All opam
Applications
* on any pin
* Two low-power comparators that operate in Deep Sleep mode
Programmable Digital
* Eight programmable logic blocks, each with 8 Macrocells and
an 8-bit data path (called universal digital blocks or UDBs)
* Cypress-provided peripheral component library, user-defined
state machi
