Description
W167B
CPU Clock Outputs 0 through 2: CPU clock outputs.Their output voltage swing is controlled by voltage applied to VDDQ2. SEL133/100#: Frequency selection input pin as shown in Table 1. PCI Clock Output 0 and Selection Bit 2: As an output, this pin works in conjunction with PCI2:9. When an input, this pin functions as part of the frequency selection address (see Table 1).PCI Clock Output 1 and Selection Bit 1: As an output, this pin works in conjunction with PCI2:9. When an input, this pi
Features
- Maximized EMI Suppression using Cypress’s Spread Spectrum technology.
- Three copies of CPU outputs selectable frequency.
- Three copies of 3V66 selectable frequency output at 3.3V.
- Ten copies of PCI clocks (selectable frequency), 3.3V.
- One double strength 14.318-MHz reference output at 3.3V.
- One copy of 48-MHz USB clock.
- One copy of selectable 24-/48-MHz for SIO.
- One copy of CPU-divide-by-2 output as reference input to Direct.
W167B_CypressSemiconductor.pdf
