DS1258Y, DS1258AB Datasheet (Dallas Semiconducotr)

DS1258Y, DS1258AB, 128k x 16 Nonvolatile SRAM

A0 to A16 DQ0 to DQ15 CEU CEL WE OE VCC GND - Address Inputs - Data In/Data Out - Chip Enable Upper Byte - Chip Enable Lower Byte - Write Enable - Output Enable - Power (+5V) - Ground DESCRIPTION The DS1258 128k x 16 nonvolatile (NV) SRAMs are 2,097,152-bit fully static, NV SRAMs, organized as 13

DS1258Y Features

* 10-Year Minimum Data Retention in the Absence of External Power Data is Automatically Protected During a Power Loss Separate Upper Byte and Lower Byte ChipSelect Inputs Unlimited Write Cycles Low-Power CMOS Read and Write Access Times as Fa