Description
1 Megabit High Speed CMOS SRAM DPS128M8CnY/BnY, DPS128X8CA3/BA3 .
The DPS128M8CnY/BnY, DPS128X8CA3/BA3 High Speed SRAM devices are a revolutionary new memory subsystem using Dense-Pac Microsystems’ ceramic Stackable.
Features
* Organization Available: 128Kx8 Access Times: 20
* , 25, 30, 35, 45ns Fully Static Operation - No clock or refresh required Single +5V Power Supply, ±10% Tolerance TTL Compatible Common Data Inputs and Outputs Low Data
Applications
* The DPS128M8BnY/DPS128X8BA3 has one active low Chip Enable (CE) while the DPS128M8CnY/DPS128X8CA3 has an active low Chip Enable (CE) and an active high Select Line (SEL). By using SLCCs, the ‘’Stack’’ family of modules offer a higher board density of memory than available with conventional through-
