74AUP1G09 Datasheet (Diodes) - SINGLE 2 INPUT POSITIVE AND GATE

74AUP1G09, SINGLE 2 INPUT POSITIVE AND GATE

The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The AUP1G09 is a single AND gate with an open drain output designed for operation over a power supply range of 0.8V to 3.6V.

The device is fully specified for partial p

74AUP1G09 Features

* Advanced Ultra Low Power (AUP) CMOS

* Supply Voltage Range from 0.8V to 3.6V

* 4mA Output Drive at 3.0V

* Low Static Power Consumption ICC < 0.9µA

* Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V)

* Schmitt Trigger Action at all inputs mak