74AUP1G125 Datasheet (Diodes) - SINGLE BUFFER GATE

74AUP1G125, SINGLE BUFFER GATE

The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

Pin Assignments The 74AUP1G125 is a single, non-inverting buffer/bus driver, designed for operation over a power supply range of 0.8V to 3.6V.

The device has a three-

74AUP1G125 Features

* Advanced Ultra Low Power (AUP) CMOS

* Supply Voltage Range from 0.8V to 3.6V

* ±4mA Output Drive at 3.0V

* Low Static Power Consumption ICC < 0.9µA

* Low Dynamic Power Consumption CPD = 6.3pF (Typical at 3.6V)

* Schmitt Trigger Action at all inputs m