74AUP1G14 Datasheet - NXP

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74AUP1G14 Low-power Schmitt-trigger inverter

www.DataSheet4U.com 74AUP1G14 Low-power Schmitt-trigger inverter Rev.01 * 20 July 2005 Product data sheet 1.General .
The 74AUP1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74AUP1G14_PhilipsSemiconductors.pdf

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Datasheet Details

Part number:

74AUP1G14

Manufacturer:

NXP ↗

File Size:

144.37 KB

Description:

Low-power Schmitt-trigger inverter

Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s ESD protection: x HBM JESD22-A114-C exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 µA (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Clas

Applications

* using IOFF. The IOFF circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74AUP1G14 provides a single inverting Schmitt-trigger which accepts standard input signals. It is capable of transforming slowly changing input signals into sha

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74AUP1G14 Low-power Schmitt-trigger inverter NXP

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