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74AUP1G125 Datasheet - NXP Semiconductors

Low-power buffer/line driver

74AUP1G125 Features

* I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114-C Class 3A. Exceeds 50

74AUP1G125 General Description

The 74AUP1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device .

74AUP1G125 Datasheet (141.24 KB)

Preview of 74AUP1G125 PDF

Datasheet Details

Part number:

74AUP1G125

Manufacturer:

NXP ↗ Semiconductors

File Size:

141.24 KB

Description:

Low-power buffer/line driver.

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74AUP1G125 Low-power buffer line driver NXP Semiconductors

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