74AUP1G157
263.01kb
Low-power 2-input multiplexer. The 74AUP1G157 is a single 2-input multiplexer. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise
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74AUP1G157-Q100 - Low-power 2-input multiplexer
(nexperia)
74AUP1G157-Q100
Low-power 2-input multiplexer
Rev. 2 — 4 November 2021
Product data sheet
1. General description
The 74AUP1G157-Q100 is a single 2-i.
74AUP1G158 - Low-power 2-input multiplexer
(nexperia)
74AUP1G158
Low-power 2-input multiplexer; inverting
Rev. 7 — 19 October 2021
Product data sheet
1. General description
The 74AUP1G158 is a single 2-.
74AUP1G11 - Low-power 3-input AND gate
(NXP)
..
74AUP1G11
Low-power 3-input AND gate
Rev. 01 — 4 September 2007 Product data sheet
1. General description
The 74AUP1G11 provides.
74AUP1G11 - Low-power 3-input AND gate
(nexperia)
74AUP1G11
Low-power 3-input AND gate
Rev. 6 — 19 May 2021
Product data sheet
1. General description
The 74AUP1G11 is a single 3-input AND gate. Schm.
74AUP1G125 - Low-power buffer/line driver
(NXP Semiconductors)
74AUP1G125
Low-power buffer/line driver; 3-state
Rev. 02 — 30 June 2006
..
Product data sheet
1. General description
The 74AUP1G12.
74AUP1G125 - SINGLE BUFFER GATE
(Diodes)
74AUP1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and ext.
74AUP1G125 - Low-power buffer/line driver
(nexperia)
74AUP1G125
Low-power buffer/line driver; 3-state
Rev. 9 — 14 January 2022
Product data sheet
1. General description
The 74AUP1G125 is a single buffe.
74AUP1G125-Q100 - Low-power buffer/line driver
(nexperia)
74AUP1G125-Q100
Low-power buffer/line driver; 3-state
Rev. 4 — 14 January 2022
Product data sheet
1. General description
The 74AUP1G125-Q100 is a si.
74AUP1G126 - Low-Power buffer/line driver
(NXP)
74AUP1G126
Low-power buffer/line driver; 3-state
Rev. 9 — 14 January 2022
Product data sheet
1. General description
The 74AUP1G126 provides a single.
74AUP1G126 - SINGLE BUFFER GATE
(Diodes)
74AUP1G126
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and ext.