74AUP1G17 Datasheet Low-power Schmitt-trigger Buffer

Manufacturer: NXP Semiconductors

Overview: www.DataSheet4U.com 74AUP1G17 Low-power Schmitt-trigger buffer Rev. 01 — 26 July 2005 Product data sheet 1.

Datasheet Details

Part number	74AUP1G17
Manufacturer	NXP Semiconductors
File Size	122.60 KB
Description	Low-power Schmitt-trigger buffer
Datasheet	74AUP1G17_PhilipsSemiconductors.pdf

The 74AUP1G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-C exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 µA (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept voltage.

Part Number	Description	Manufacturer
74AUP1G17	SINGLE SCHMITT-TRIGGER BUFFER	Diodes
74AUP1G17	Low-power Schmitt trigger	nexperia
74AUP1G175	Low-power D-type flip-flop	nexperia
74AUP1G175-Q100	Low-power D-type flip-flop	nexperia

Part Number	Description
74AUP1G175	Low Power D-Type Flip-Flop
74AUP1G11	Low-power 3-input AND gate
74AUP1G126	Low-Power buffer/line driver
74AUP1G14	Low-power Schmitt-trigger inverter
74AUP1G02	Low-power 2-input NOR gate
74AUP1G0832	Low Power 3-Input AND-OR Gate
74AUP1G09	Low-power 2-input AND Gate
74AUP1G240	Low-power inverting buffer/line driver
74AUP1G32	Low-power 2-input OR gate
74AUP1G3208	Low Power 3-Input OR-AND Gate