74AUP1G00 Datasheet - Diodes

74AUP1G00, SINGLE 2 INPUT POSITIVE NAND GATE

74AUP1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended b

Features

* Advanced Ultra Low Power (AUP) CMOS
* Supply Voltage Range from 0.8V to 3.6V
* ±4 mA Output Drive at 3.0V
* Low Static Power Consumption ICC < 0.9µA
* Low Dynamic Power Consumption CPD = 6pF (Typical at 3.6V)
* Schmitt Trigger Action at all inputs ma

Applications

* Pin Assignments The 74AUP1G00 is a single two-input positive NAND gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventin

74AUP1G00-Diodes.pdf