M12L128168A-7TG2S, M12L128168A - 2M x 16 Bit x 4 Banks Synchronous DRAM

ESMT

Datasheet Details

Part number	M12L128168A-7TG2S, M12L128168A
Manufacturer	ESMT
File Size	785.62 KB
Description	2M x 16 Bit x 4 Banks Synchronous DRAM
Datasheet	M12L128168A_EliteSemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: M12L128168A-7TG2S, M12L128168A. Please refer to the document for exact specifications by model.

The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits.

JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) All inputs are sampled at the positive going edge of the system clock Burst Read single write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) M12L128168A (2S) 2M x 16 Bit x 4 Banks Synchronous DRAM.

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Published: Mar 24, 2019 |