QL2009-0PQ208I, QL2 3.3V and 5.0V pASIC 2 FPGA Combining Speed/ Density/ Low Cost and Flexibility

Description

3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev.C pASIC 2 HIGHLIGHTS ® QL2009 Ultimate Verilog/VHDL Silicon Solu.
Pin TDI TRSTB TMS TCK TDO STM I/ACLK I/GCLK I I/O VCC GND Function Test Data In for JTAG Active low Reset for JTAG Test Mode Select for JTAG Test Clo.

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QL2009-0PQ208I Datasheet Preview — This datasheet PDF includes multiple part numbers: QL2009-0PQ208I, QL2. Please refer to the document for exact specifications by model.

Datasheet Specifications

Part number: QL2009-0PQ208I, QL2
Manufacturer: ETC
File Size: 272.83 KB
Datasheet: QL2-009.pdf
Description: 3.3V and 5.0V pASIC 2 FPGA Combining Speed/ Density/ Low Cost and Flexibility
Note: This datasheet PDF includes multiple part numbers: QL2009-0PQ208I, QL2.
Please refer to the document for exact specifications by model.

Features

* -3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2009 Block Diagram 672 Logic Cells 3-35 QL2009 PRODUCT SUMMARY The Q

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QL2 3.3V and 5.0V pASIC FPGA Combining Speed Density Low Cost and Flexibility ETC

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