74S280 - DM74S280

Product Overview

Fairchild Semiconductor

Datasheet Details

Part number	74S280
Manufacturer	Fairchild Semiconductor
File Size	61.25 KB
Description	DM74S280
Datasheet	74S280 Datasheet
Additional preview pages of the 74S280 datasheet.

Product details

Description

These universal, nine-bit parity generators/checkers utilize Schottky-clamped TTL high-performance circuitry, and feature odd/even outputs to facilitate operation of either odd or even parity applications.

Features

s Generates either odd or even parity for nine data lines s Cascadable for N-bits s Can be used to upgrade existing systems using MSI par- ity circuits s Typical data-to-output delay.
14 ns Ordering Code: Order Number Package Number Package.

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Other Datasheets by Fairchild Semiconductor

74S253 - Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer
74S08 - Quad 2-Input AND Gate
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74S112 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
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74S139 - Decoder/Demultiplexer

Published: Sep 1, 2015 |