CD4027BC - Dual J-K Master/Slave Flip-Flop

Product Overview

Fairchild Semiconductor

Datasheet Details

Part number	CD4027BC
Manufacturer	Fairchild Semiconductor
File Size	56.43 KB
Description	Dual J-K Master/Slave Flip-Flop
Datasheet	CD4027BC Datasheet
Additional preview pages of the CD4027BC datasheet.

Product details

Description

The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors.

Features

s Wide supply voltage range: s High noise immunity: 3.0V to 15V 0.45 VDD (typ. ) s Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS s Low power: 50 nW (typ. ) s Medium speed operation: 12 MHz (typ. ) with 10V supply Ordering Code: Order Number CD4027BCM CD4027BCN Package Number M16A N16E Package.

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Other Datasheets by Fairchild Semiconductor

CD4027BCM - Dual J-K Master/Slave Flip-Flop
CD4027BCN - Dual J-K Master/Slave Flip-Flop
CD4027BCM - Dual J-K Master/Slave Flip-Flop
CD4027BCN - Dual J-K Master/Slave Flip-Flop
CD4027BCM - Dual J-K Master/Slave Flip-Flop
CD4027BCN - Dual J-K Master/Slave Flip-Flop

Published: Aug 1, 2014 |