Datasheet Details
| Part number | CD4027BM | 
|---|---|
| Manufacturer | National Semiconductor ↗ | 
| File Size | 125.46 KB | 
| Description | Dual J-K Master/Slave Flip-Flop | 
| Datasheet |  CD4027BM_NationalSemiconductor.pdf | 
 
		  | Part number | CD4027BM | 
|---|---|
| Manufacturer | National Semiconductor ↗ | 
| File Size | 125.46 KB | 
| Description | Dual J-K Master/Slave Flip-Flop | 
| Datasheet |  CD4027BM_NationalSemiconductor.pdf | 
These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors Each flip-flop has independent J K set reset and clock inputs and buffered Q and Q outputs These flip-flops are edge sensitive to the clock input and change state on the positive-going transition of the clock pulses Set or reset is independent of the clock and is accomplished by a high level on the respective input All inputs are protected against da
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