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CD4027BM Dual J-K Master/Slave Flip-Flop

CD4027BM Description

CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset February 1988 CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Re.
These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors Ea.

CD4027BM Features

* Y Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Low power Medium speed operation 3 0V to 15V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS 50 nW (typ ) 12 MHz (typ ) with 10V supply Schematic and Connection Diagrams TL F 5958
* 1 Dual-In

CD4027BM Applications

* Ripple Binary Counters TL F 5958
* 3 Shift Registers TL F 5958
* 4 Truth Table  tnb1 Inputs CL U L L L L K X X X Where X t Outputs n J I X O X X X X X K X O X I X X X X S O O O O O I O I R O O O O O O I I Q O I O I X X X X Q I I O O I O I Q O O I I (No Change) O I I I e

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Datasheet Details

Part number
CD4027BM
Manufacturer
National Semiconductor
File Size
125.46 KB
Datasheet
CD4027BM_NationalSemiconductor.pdf
Description
Dual J-K Master/Slave Flip-Flop

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Dual J-K Master Slave Flip-Flop National Semiconductor
National Semiconductor CD4027BM-like datasheet