CD4027BMS CMOS Dual J-K Master-Slave Flip-Flop

Intersil Corporation

Description

CD4027BMS December 1992 CMOS Dual J-K Master-Slave Flip-Flop Pinout CD4027BMS TOP VIEW .
of ‘B’ Series CMOS Devices” Q2 1 Q2 2 CLOCK 2 3 RESET 2 4 K2 5 J2 6 SET 2 7 VSS 8 16 VDD 15 Q1 14 Q1 13 CLOCK 1 12 RESET 1 11 K1 10 J1 9 SET 1 Func.

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Datasheet Specifications

Part number: CD4027BMS
Manufacturer: Intersil Corporation
File Size: 72.40 KB
Datasheet: CD4027BMS_IntersilCorporation.pdf
Description: CMOS Dual J-K Master-Slave Flip-Flop

Features

* High Voltage Type (20V Rating)
* Set - Reset Capability
* Static Flip-Flop Operation - Retains State Indeﬁnitely with Clock Level Either “High” or “Low”
* Medium Speed Operation - 16MHz (typ. ) Clock Toggle Rate at 10V
* Standardized Symmetrical Output Charac

CD4027BMS Distributors

📁 Related Datasheet

CD4027BM CD4027B CD4027BC CD4027BCM CD4027BCN CD4027BE

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CD4027BMS CMOS Dual J-K Master-Slave Flip-Flop Intersil Corporation

Intersil Corporation CD4027BMS-like datasheet