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DM74LS109A Datasheet - Fairchild Semiconductor

DM74LS109A - Dual Positive-Edge-Triggered J-K Flip-Flop

This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge .

DM74LS109A_FairchildSemiconductor.pdf

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Datasheet Details

Part number:

DM74LS109A

Manufacturer:

Fairchild Semiconductor

File Size:

52.34 KB

Description:

Dual positive-edge-triggered j-k flip-flop.

DM74LS109A Distributor

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DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop Fairchild Semiconductor