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FAN1654

1.5A LDO/ DDR Bus Termination Regulator

FAN1654 Features

* Sinks and sources 1A continuous, 1.5A peak -40°C to +125°C Operating Range Load regulation: (VDDQ/2) ± 40mV 5mA VREF buffer tracks VTT On-chip thermal limiting Power-enhanced eTSSOP™-16 package Low Current Shutdown Mode

FAN1654 General Description

The FAN1654 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 1A continuous, 1.5A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = (VDDQ/2) ± 40mV. The FAN1654 includes a buffe.

FAN1654 Datasheet (80.86 KB)

Preview of FAN1654 PDF

Datasheet Details

Part number:

FAN1654

Manufacturer:

Fairchild Semiconductor

File Size:

80.86 KB

Description:

1.5a ldo/ ddr bus termination regulator.

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FAN1654 1.5A LDO DDR Bus Termination Regulator Fairchild Semiconductor

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