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Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
MWS5101A
A3
A2
AI
AO 4
A5 5 A6
07
V55 01 I
8 9
001 -10
Dr2
II
22
21 20 19 18 17 16 15 14 13 12
TOP VIEW
VDD A4 R/W
CSf
o0 CS2 004
Dr4 003
DB 002
9ZCS-29976RI
TERMINAL ASSIGNMENT
256-Word by 4-Bit LSI Static Random-Access Memory
Features:
• Industry standard Pinout
• TTL compatible
• Very low operating current-B mA
at Voo = 5 V and cycle time = 1 iJS
• Output-Disable for common I/O systems • 3-state data output for bus-oriented
• Two Chip-Select Inputs-simple
systems
memory expansion
• Separate data inputs and outputs
• Memory retention for standby battery
voltage of 2 V min.