Description
Table
Symbol
Description
Type Comments
SA
Synchronous Address Inputs
Input.
R
Synchronous Read
Input Active Low
W
Synchronous Write
Input Active Low
BW0.
BW3
Synchronous Byte Writes
Input
Active Low x18/x36 only
K
Input Clock
Input Active High
K
Input Clock
Input Active Low
TMS
Test Mode Select
Input.
TDI
Test Data Input
Input.
TCK
Test Clock Input
Input.
TDO
Test Data Output
Output.
VREF
HSTL Input Referenc.
Features
- 2.5 Clock Latency.
- Simultaneous Read and Write SigmaQuadâ„¢ Interface.