* 2.0 Clock Latency
* Simultaneous Read and Write SigmaDDR™ Interface
* Common I/O bus
* JEDEC-standard pinout and package
* Double Data Rate interface
* Byte Write controls sampled at data-in time
* Burst of 2 Read and Write
* Dual-Ran
GS81302TT07GE Datasheet (216.17 KB)
GS81302TT07GE
GSI Technology
216.17 KB
144mb sigmaddr-ii+ burst of 2 sram.
GS81302TT07/10/19/37E-450/400/350/333/300
165-Bump BGA Commercial Temp Industrial Temp
144Mb SigmaDDRTM-II+ Burst of 2 SRAM
450 MHz
*300 MHz.
📁 Related Datasheet
GS81302TT07E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT06E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT06GE 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT107E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT10E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT10GE 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT110E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT11E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT11GE 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
GS81302TT19E 144Mb SigmaDDR-II+ Burst of 2 SRAM (GSI Technology)
