GS8662S08E-167 - DDR SigmaSIO-II SRAM
Table Symbol SA NC R/W NW0 *NW1 BW0 *BW1 BW0 *BW3 K C TMS TDI TCK TDO VREF ZQ K C DOFF LD CQ CQ Dn Qn VDD VDDQ VSS Description Synchronous Address Inputs No Connect Read/Write Contol Pin Synchronous Nybble Writes Synchronous Byte Writes Synchronous Byte Writes Input Clock Outpu
GS8662S08E-167 Features
* Simultaneous Read and Write SigmaSIO™ Interface
* JEDEC-standard pinout and package
* Dual Double Data Rate interface
* Byte Write controls sampled at data-in time
* DLL circuitry for wide output data valid window and future frequency scaling
* Burst
