HD74HC4024 Datasheet PDF - Hitachi Semiconductor 7-stage Binary Counter Specs

HD74HC4024 - 7-stage Binary Counter

Datasheet Summary

Description

The HD74HC4024 is a 7-stage counter.

This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.

Features

High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock L L H H Reset L H L H L H L H Outputs State No change All outputs are low No change All outputs are low No change All outputs are low Advance to next state All outputs are low HD74HC4.

Datasheet Details

Part number	HD74HC4024
Manufacturer	Hitachi Semiconductor
File Size	47.76 KB
Description	7-stage Binary Counter
Datasheet	HD74HC4024 Datasheet
Additional preview pages of the HD74HC4024 datasheet.

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Full PDF Text Transcription

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HD74HC4024 7-stage Binary Counter Description The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.

Published: Mar 23, 2005 |