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HD74HCT643 - Octal Bus Transceivers (with 3-state outputs)

Datasheet Summary

Description

Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G ), and a direction control (DIR).

When the DIR input is high, data flows from the A inputs to the B outputs.

When DIR is low, data flows from B to A.

Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Control Input G L L H DIR L H X Operation HD74HCT640 B data to A bus A data to B bus Isolation HD74HCT6.

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Datasheet Details

Part number HD74HCT643
Manufacturer Hitachi Semiconductor
File Size 52.30 KB
Description Octal Bus Transceivers (with 3-state outputs)
Datasheet download datasheet HD74HCT643 Datasheet
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Full PDF Text Transcription

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HD74HCT640/HD74HCT643 Octal Bus Transceivers (with 3-state outputs) Description Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G ), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.
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