HM62W8512B Datasheet (Hitachi Semiconductor) - 4 M SRAM (512-kword x 8-bit)

HM62W8512B, 4 M SRAM (512-kword x 8-bit)

The Hitachi HM62W8512B is a 4-Mbit static RAM organized 512-kword × 8-bit.

It realizes higher density, higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology.

The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II is available for

HM62W8512B Features

* Single 3.3 V supply: 3.3 V ± 0.3 V

* Access time: 55/70 ns (max)

* Power dissipation  Active: 16.5 mW/MHz (typ)  Standby: 3.3 µW (typ)

* Completely static memory. No clock or timing strobe required

* Equal access and cycle times

* Common data input