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HM62W8511H - 4M High Speed SRAM (512-kword x 8-bit)

Datasheet Summary

Description

The HM62W8511H is a 4-Mbit high speed static RAM organized 512-kword × 8-bit.

It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology.

Features

  • Single supply : 3.3 V ± 0.3 V.
  • Access time 12/15 ns (max).
  • Completely static memory  No clock or timing strobe required.
  • Equal access and cycle times.
  • Directly TTL compatible  All inputs and outputs.
  • Operating current : 150/130 mA (max).
  • TTL standby current : 60/50 mA (max).
  • CMOS standby current : 5 mA (max) : 1 mA (max) (L-version).
  • Data retension current : 0.6 mA (max) (L-version).
  • Data retension volta.

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Datasheet Details

Part number HM62W8511H
Manufacturer Hitachi Semiconductor
File Size 74.74 KB
Description 4M High Speed SRAM (512-kword x 8-bit)
Datasheet download datasheet HM62W8511H Datasheet
Additional preview pages of the HM62W8511H datasheet.

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Full PDF Text Transcription

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HM62W8511H Series 4M High Speed SRAM (512-kword × 8-bit) ADE-203-750D (Z) Rev. 1.0 Sep. 15, 1998 Description The HM62W8511H is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. The HM62W8511H is packaged in 400-mil 36-pin SOJ for high density surface mounting. Features • Single supply : 3.3 V ± 0.
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