HM62W8512B Description
The Hitachi HM62W8512B is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II is available for high density mounting.
HM62W8512B Key Features
- Single 3.3 V supply: 3.3 V ± 0.3 V
- Access time: 55/70 ns (max)
- Power dissipation Active: 16.5 mW/MHz (typ) Standby: 3.3 µW (typ)
- pletely static memory. No clock or timing strobe required
- Equal access and cycle times
- mon data input and output: Three state output
- Directly LV-TTL patible: All inputs and outputs
- Battery backup operation
- Memory Matrix 1,024 × 4,096 V CC V SS
- CS WE OE Timing Pulse Generator Read/Write Control