Datasheet Specifications
- Part number
- H57V2582GTR-60I
- Manufacturer
- Hynix Semiconductor
- File Size
- 227.17 KB
- Datasheet
- H57V2582GTR-60I-HynixSemiconductor.pdf
- Description
- 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O
Description
256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O 256M (32Mx8bit) Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 8,388,608 x 8 This .
Features
* Standard SDRAM Protocol Internal 4bank operation Power Supply Voltage : VDD = 3.3V, VDDQ = 3.3V All device pins are compatible with LVTTL interface Low Voltage interface to reduce I/O power 8,192 Refresh cycles / 64ms Programmable CAS latency of 2 or 3 Programmable Burst Length and Burst TypeApplications
* which requires large memory density and high bandwidth. It is organized as 4banks of 8,388,608 x 8 I/O. Synchronous DRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Synchronous DRAM latch each control signal at the rising edge of a basic input clock (CLK) and inpuH57V2582GTR-60I Distributors
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