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H5DU1262GTR 128Mb DDR SDRAM

H5DU1262GTR Description

www.DataSheet4U.com 128Mb DDR SDRAM H5DU1262GTR This document is a general product .
and is subject to change without notice.

H5DU1262GTR Features

* VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333 ,400 and 500) All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirec

H5DU1262GTR Applications

* which requires large memory density and high bandwidth. This Hynix 128Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data str

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