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CI-MCP Specification
4GB eNAND (x8) + 4Gb LPDDR2-S4B (x32)
This document is a general product description and is subject to change without notice. SK hynix does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev 0.3 / Jan. 2013
1
Preliminary H9TP32A4GDBCPR 4GB eNAND (x8) / LPDDR2-S4B 4Gb(x32) Document Title CI-MCP 4GB eNAND(x8) Flash / 4Gb (x32) LPDDR2-S4B
Revision History
Revision No.
History
Draft Date
0.1 - Initial Draft
Sep. 2012
0.2 - Corrected Ball Assignment
Sep. 2012
- Updated IDD specifications
- Corrected tERR(2per, DDR2 1066) in AC TIMING PARAMETERS
0.3 from 135 to 132
Jan. 2013
- Corrected Revision ID1 in MR6 Basic Configuration2 from
00000001B to 00000010B
Remark Preliminary Preliminary
Preliminary
Rev 0.