* JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 8 Bank architecture Posted CAS Programmable CAS Latency 3 , 4 , 5 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination)
HYMP112P72CP8-C4 Datasheet (256.88 KB)
HYMP112P72CP8-C4
Hynix Semiconductor
256.88 KB
240pin registered ddr2 sdram dimms based on 1gb.
240pin Registered DDR2 SDRAM DIMMs based on 1Gb version C This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 1Gb version C DD.
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