HYMP112R72CP8-E3 - 240pin Registered DDR2 SDRAM DIMMs based on 1Gb
and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
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Rev.
0.2 / Jun.
2007 1 1240pin Registered DDR2 SDRAM DIMMs SPEED GRADE & KEY PARAMETERS E3 (DDR2-400) Speed@CL3 Speed@CL4 Speed@CL5 CL-tRCD-
HYMP112R72CP8-E3 Features
* JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 8 Bank architecture Posted CAS Programmable CAS Latency 3 , 4 , 5 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination)