* JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 8 Bank architecture Posted CAS Programmable CAS Latency 3, 4, 5, 6 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination
HMP31GP7AFR4C-Y5 Datasheet (190.03 KB)
HMP31GP7AFR4C-Y5
Hynix
190.03 KB
240pin registered ddr2 sdram dimms based on 2gb.
240pin Registered DDR2 SDRAM DIMMs based on 2Gb version A This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 2Gb version A DDR.
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