tables are also provided in this chapter.
Chapter 6, “CPU Exception Processing,” defines and describes the various exception types and handling processes for the RC32334.
Also provided in this chapter are the CPO register formats, their field descriptions, and general exception handling flowcharts.
www.DataSheet4U.com IDT79RC32334 and IDT79RC32332 Integrated Communications Processors (Y Revision) RISCore™ 32300 Family w w User Reference Manual w .D at June 2002 aS he et 2975 Stender Way, Santa Clara, California 95054 Telephone: (800) 345-7015 TWX: 910-338-2070 FAX: (408) 330-1748 Printed in U.S.A.
©2001 Integrated Device Technology, Inc.
4U .c om www.DataSheet4U.com www.DataSheet4U.com GENERAL DISCLAIMER Integrated Device Technology, Inc.
reserves the
79RC32332 Features
* for the device as well as a system block diagram and internal register maps. Chapter 2, “RC32300 CPU Core,” describes the features of the RC32300 CPU core. Chapter 3, “CPU Instruction Set Overview,” presents a general overview on the three CPU instruction formats as well as the computational instruc
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