79RC32435 - Communications Processor

Integrated Device Technology

Datasheet Details

Part number	79RC32435
Manufacturer	Integrated Device Technology
File Size	0.99 MB
Description	Communications Processor
Datasheet	79RC32435_IntegratedDeviceTechnology.pdf

x 32-bit CPU Core.
MIPS32 instruction set.
Cache Sizes: 8KB instruction and data caches, 4-Way set associative, cache line locking, non-blocking prefetches.
16 dual-entry JTLB with variable page sizes.
3-entry instruction TLB.
3-entry data TLB.
Max issue rate of one 32x16 multiply per clock.
Max issue rate of one 32x32 multiply every other clock.
CPU control with start, stop, and single stepping.
Software breakpoint.

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Published: Sep 19, 2008 |