* 12 - 0.7V current mode differential HCSL output pairs Features/Benefits
* 3 Selectable SMBus Addresses/Mulitple devices can share the same SMBus Segment
* 12 OE# pins/Hardware control of each output
* PLL or bypass mode/PLL can dejitter incoming clock
* Sel
9DB1233
IDT
182.17 KB
Twelve output differential buffer.
Twelve Output Differential Buffer for PCIe Gen3 DATASHEET 9DB1233 Recommended Application 12 output PCIe Gen3 zero-delay/fanout buffer General Descr.
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