9DBL0653 - 6-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0653 Features
* ▪ Loss Of Signal (LOS) open drain output ▪ 6
* 1-200 MHz Low-Power (LP) HCSL DIF pairs ▪ 9DBL0643 default Zout = 100Ω ▪ 9DBL0653 default Zout = 85Ω ▪ Easy AC-coupling to other logic families, see IDT application note AN-891. Key Specifications ▪ PCIe Gen1-4 CC compliant in ZDB or fanout buffe
