IDT71V546S Datasheet - IDT

IDT71V546S, 3.3V Synchronous SRAM

128K x 36, 3.3V Synchronous IDT71V546S SRAM with ZBT™ .

Features

* 128K x 36 memory configuration, pipelined outputs
* Supports high performance system speed - 133 MHz (4.2 ns Clock-to-Data Access)
* ZBTTM Feature - No dead cycles between write and read cycles
* Internally synchronized registered outputs eliminate the need to control OE
* Sing

Applications

* 4-word burst capability (interleaved or linear)
* Individual byte write (BW1 - BW4) control (May tie active)
* Three chip enables for simple depth expansion
* Single 3.3V power supply (±5%)
* Packaged in a JEDEC standard 100-pin TQFP package
* Green parts available, see Ord

IDT71V546S-IDT.pdf