* 256K x 36, 512K x 18 memory configurations Supports high performance system speed - 100 MHz (7.5 ns Clock-to-Data Access) ZBTTM Feature - No dead cycles between write and read cycles Internally synchronized output buffer enable eliminates the need to control OE Single R/W (READ/WRITE) control pin 4
IDT71V65702 Datasheet (520.57 KB)
IDT71V65702
IDT
520.57 KB
(idt71v65702 / idt71v65902) synchronous zbt srams.
www.DataSheet4U.com 256K x 36, 512K x 18 3.3V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs x x x x x x x x x x x x IDT71V6570.
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