IS61LPS25618EC Features
* Internal self-timed write cycle
* Individual Byte Write Control and Global Write
* Clock controlled, registered address, data and control
* Burst sequence control using MODE input
* Three chip enable option for simple depth expansion and address pipelining
* Common data inp
Datasheet Details
IS61LPS25618EC, IS61LPS12836EC
ISSI
2.16 MB
Single cycle deselect sram.
This datasheet PDF includes multiple part numbers: IS61LPS25618EC, IS61LPS12836EC.
Please refer to the document for exact specifications by model.
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IS61LPS25618EC Distributor
