* Internal self-timed write cycle
* Individual Byte Write Control and Global Write
* Clock controlled, registered address, data and control
* Burst sequence control using MODE input
* Three chip enable option for simple depth ex- pansion and address pipelini
IS61LPS12832A Datasheet (540.52 KB)
IS61LPS12832A
Integrated Silicon Solution
540.52 KB
4mb synchronous pipelined single cycle deselect static ram.
IS61(64)LPS12832A IS61(64)LPS12836A IS61(64)VPS12836A IS61(64)LPS25618A IS61(64)VPS25618A
128K x 32, 128K x 36, 256K x 18
DECEMBER 2013
4 Mb SYNCHR.
📁 Related Datasheet
IS61LPS12832EC SINGLE CYCLE DESELECT SRAM (ISSI)
IS61LPS12836A 4Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM (Integrated Silicon Solution)
IS61LPS12836EC SINGLE CYCLE DESELECT SRAM (ISSI)
IS61lPS102418A 18Mb Single CYCLE DESELECT STATIC RAM (ISSI)
IS61LPS102418B SINGLE CYCLE DESELECT STATIC RAM (Integrated Silicon Solution)
IS61LPS102436A 36Mb Single CYCLE DESELECT STATIC RAM (Integrated Silicon Solution)
IS61LPS102436B 36Mb Single CYCLE DESELECT STATIC RAM (ISSI)
IS61LPS204818A 36Mb Single CYCLE DESELECT STATIC RAM (Integrated Silicon Solution)
IS61LPS204818B 36Mb Single CYCLE DESELECT STATIC RAM (ISSI)
IS61LPS25618A 4Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM (Integrated Silicon Solution)
TAGS
Image Gallery
