IS61QDPB42M36A Datasheet - ISSI

72Mb QUADP (Burst 4) SYNCHRONOUS SRAM

IS61QDPB42M36A Features

* 2Mx36 and 4Mx18 configuration available.

* On-chip Delay Locked Loop (DLL) for wide data valid window.

* Separate independent read and write ports with concurrent read and write operations.

* Synchronous pipeline read with late write operation.

* Double Data Rate (DDR) interfac

IS61QDPB42M36A General Description

at page 6 for each ODT option. DESCRIPTION The 72Mb IS61QDPB42M36A/A1/A2 and IS61QDPB44M18A/A1/A2 are synchronous, highperformance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiate.

IS61QDPB42M36A Datasheet (698.51 KB)

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IS61QDPB42M36A

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ISSI

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698.51 KB

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72mb quadp (burst 4) synchronous sram.

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IS61QDPB42M36A 72Mb QUADP Burst SYNCHRONOUS SRAM ISSI

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IS61QDPB42M36A Features

IS61QDPB42M36A General Description

Datasheet Details

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