32N50Q Datasheet (IXYS Corporation)

32N50Q, IXFR32N50Q

www.DataSheet4U.com HiPerFETTM Power MOSFETs ISOPLUS247TM (Electrically Isolated Back Surface) N-Channel Enhancement Mode High dV/dt, Low trr, HDMOSTM Family Preliminary data Symbol VDSS VDGR VGS VGSM ID25 IDM IAR EAS EAR dv/dt PD TJ TJM Tstg TL VISOL Weight 1.6 mm (0.062 in.) from case for 10 s 50/60 Hz, RMS t = 1 minute leads-to-tab Test Conditions TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MW Continuous Transient TC = 25°C TC = 25°C, Pulse width limited by TJM TC = 25°C TC = 25°C TC = 25

32N50Q Features

* Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation

* Low drain to tab capacitance(