CS60-12IO1 Datasheet - IXYS Corporation

CS60-12IO1 Phase Control Thyristor

CS 60 Phase Control Thyristor VRRM = 1200-1600 V IT(RMS) = 75 A IT(AV)M = 48 A Preliminary Data Sheet VRSM VDSM V 1300 1500 1700 VRRM VDRM V 1200 1400 1600 CS 60-12io1 CS 60-14io1 CS 60-16io1 Type A C C A G A (TAB) PLUS247 G C = Cathode, A = Anode, G = Gate Symbol IT(RMS) IT(AV)M ITSM Test Conditions TVJ = TVJM (lead current limit) TC = 105°C; 180° sine TVJ = 45°C; VR = 0 V TVJ = TVJM VR = 0 V t = 10 ms (50 Hz), sine t = 8.3 ms (60 Hz), sine t = 10 ms (50 Hz), sine t = 8.3 ms (60 Hz), si.

CS60-12IO1 Features

* z z z z Thyristor for line frequency International standard package JEDEC TO-247 Planar passivated chip Long-term stability of blocking currents and voltages i2t TVJ = 45°C VR = 0 V TVJ = TVJM VR = 0 V Applications z z z z (di/dt)cr TVJ = TVJM repetitive, IT = 60 A f = 50 Hz, tP =200 µs VD =

CS60-12IO1_IXYSCorporation.pdf