SEMD48 - NPN/PNP Silicon Digital Transistor Array Preliminary data
SEMD48 NPN/PNP Silicon Digital Transistor Array Preliminary data Switching circuit, inverter, interface circuit, driver circuit Two (galvanic) internal isolated NPN/PNP Transistors in one package Built in bias resistor NPN: R1 = 47kΩ, R2 = 47kΩ PNP: R1= 2.2kΩ, R2 = 47kΩ Tape loading orientation Top View 3 2 1 4 5 3 6 1 2 C1 6 B2 5 E2 4 Marking on SOT666 package (for example W R) corresponds to pin 1 of device Position in tape: pin 1 same of feed hole side R2 R
